1. Field of the Invention
The present invention relates to a photodiode for CMOS image sensor; more particularly, the invention relates to a method of forming a high performance photodiode with tightly-controlled junction profile for CMOS image sensor with STI (Shallow Trench Insolation) process.
2. Description of the Prior Art
Compared to charge coupled device (CCD) sensors, a CMOS image sensor has many advantages such as low voltage operation, low power consumption, compatibility with logic circuitry, random access, and low cost. Currently, the photodiode of a conventional CMOS image sensor is devised according to the following approaches: (1) N+/PW (or NPS/PW) is used for sensing high-intensity light because of inherent high dark current and low absorption rate; (2) NW/PSUB is used for sensing low-light and near red-light region. In particular, xe2x80x9cN+xe2x80x9d is a shorthand for N+ type junction, xe2x80x9cPWxe2x80x9d for P type well, xe2x80x9cNPSxe2x80x9d for N type pixel sensor, xe2x80x9cNWxe2x80x9d for N well, and xe2x80x9cPSUBxe2x80x9d for P substrate. Furthermore, most conventional pixel architectures convert the photo-charge to either a voltage or a current by placing the photo-charge onto a high impedance node such as the gate of a MOSFET. This high impedance node needs to be isolated from the rest of the pixel circuit, and this is usually done by a MOSFET switch. Off-current from that MOSFET switch thus appears as xe2x80x9cdark currentxe2x80x9d. However, the junction profile of the NW/PSUB cannot be easily controlled due to implantation through field oxide, especially for a shallow trench isolation (STI) process. Therefore, a high performance photodiode with variable junction profile per customer""s requirement is useful for the manufacture of a CMOS image sensor.
FIGS. 1A and 1B are cross sectional views illustrating the steps involved in the process of forming a conventional NW/PSUB photodiode. This process begins by providing a p-type substrate 20 having a shallow trench isolation 22 readily formed. Referring to FIG. 1B, a n-well region 24 and a p-well region 26 is then doped, following the procedures of a standard CMOS process, by implanting phosphorus and boron ions into respective regions by the shallow trench isolation 22. Thus, the photodiode is constituted of at least a n-well region 24 doped in a p substrate 20. In this process, the junction profile of the n-well region 24 is controlled by a CMOS process which is not adjustable to meet various product""s requirements.
In view of the above disadvantages, it is therefore an object of the present invention to provide a method of forming a high performance photodiode with tightly-controlled junction profile for CMOS image sensor with STI process.
According to the present invention, a method to fabricate a high performance photodiode includes at least the following steps. First, a p-type silicon substrate is provided as a base. Next, a pad oxide layer and thereon a nitride layer are sequentially formed on the surface of the substrate. Then, the nitride layer and the pad oxide layer are etched at the same time by means of a photolithography process to form a hard mask layer with a defined pattern. Further, a shallow trench is formed by an etching process using a photoresist layer and the hard mask layer as an etching mask for etching the substrate. Next, a wet or a dry thermal oxidation process is performed to form an oxide lining inside the shallow trench. A first thermal annealing process is performed. Then, a photoresist layer is formed over the nitride layer and the oxide lining. A n-well region is formed by defining a predetermined pattern on the photoresist layer through a photolithography process. The n-well region is doped with phosphorus by an ion-implanting process. In particular, the concentration of the phosphorus ions implanted varies depending on the requirement and specification of a product. Next, the photoresist layer is removed. A second thermal annealing process is performed to make the implanted ions uniformly diffused in the n-well region. Next, a silicon oxide layer is deposited on the substrate and to fill in the shallow trench completely. Then, excessive silicon oxide layer is removed from the surface of the substrate so that only the silicon oxide layer inside the shallow trench remains. Finally, the hard mask layer is removed, and a photodiode according to the present invention, which is a transistor, is thus formed on the substrate with tightly-controlled junction profile.
With the above process flow implemented, variable junction profile can be accomplished by adjusting such processing parameters as the concentration of the implanted ions, the annealing temperature, and the annealing time etc, to meet the specification and requirement of a CMOS image sensor product. The photodiode fabricated according to the method of the present invention has the advantage of bypassing a silicide process typically required in a conventional photodiode-fabricating process. Furthermore, the method of the present invention is also compatible with the standard method for fabricating logic devices. The high performance photodiode fabricated according to the method of the present invention also possesses low-leak junctions processed by a furnace annealing process without incurring any impact to the performance of the device.